Microprocessor & Microcontroller Systems (1333202) - Summer 2024 Solution

Question 1(a) [3 marks]

#

List common features of 8051 microcontroller.

Answer:

Table: Common Features of 8051 Microcontroller

Mnemonic: “On Program Data I/O Timers Serial Interrupts SFRs”

Question 1(b) [4 marks]

#

Define T-State, Machine Cycle, Instruction Cycle and Opcode.

Answer:

Table: Microprocessor Timing Definitions

• T-State: Smallest unit of time in microprocessor operation
• Machine Cycle: Contains multiple T-states for memory access
• Instruction Cycle: Complete instruction execution time
• Opcode: Binary code identifying specific instruction

Mnemonic: “Time Machine Instruction Operation”

Question 1(c) [7 marks]

#

Compare Von-Neumann and Harvard Architecture.

Answer:

Table: Von-Neumann vs Harvard Architecture Comparison

graph TB
    subgraph "Von-Neumann Architecture"
        CPU1[CPU] <--> MEM1[Single Memory<br/>Code + Data]
    end
    
    subgraph "Harvard Architecture"
        CPU2[CPU] <--> PMEM[Program Memory]
        CPU2 <--> DMEM[Data Memory]
    end

Key Differences:

• Memory Access: Von-Neumann uses sequential access, Harvard allows simultaneous
• Performance: Harvard is faster for embedded applications
• Applications: Von-Neumann for general computing, Harvard for real-time systems

Mnemonic: “Von-Single Harvard-Dual”

Question 1(c) OR [7 marks]

#

Explain Microcomputer System with block diagram.

Answer:

Microcomputer System Components:

graph TB
    subgraph "Microcomputer System"
        CPU[Central Processing Unit<br/>- Control Unit<br/>- ALU<br/>- Registers] 
        MEM[Memory Unit<br/>- RAM<br/>- ROM]
        IO[Input/Output Unit<br/>- Keyboard<br/>- Display<br/>- Ports]
        SYS[System Bus<br/>- Address Bus<br/>- Data Bus<br/>- Control Bus]
        
        CPU <--> SYS
        MEM <--> SYS
        IO <--> SYS
    end

Table: Microcomputer System Components

• CPU: Executes instructions and controls system operation
• Memory: Stores programs and data for processing
• I/O: Provides communication with external devices
• Bus: Connects all components for data transfer

Mnemonic: “CPU Memory I/O Bus”

Question 2(a) [3 marks]

#

Draw Bus organization in 8085 Microprocessor.

Answer:

Table: 8085 Bus Organization

Mnemonic: “Address Data Control”

Question 2(b) [4 marks]

#

List Flags used in 8085 and Explain working of each flags.

Answer:

Table: 8085 Flags Register

• Sign Flag: Indicates negative result (MSB = 1)
• Zero Flag: Set when arithmetic result is zero
• Auxiliary Carry: Used for BCD arithmetic operations
• Parity Flag: Checks even number of 1’s in result
• Carry Flag: Indicates overflow in arithmetic operations

Mnemonic: “Sign Zero Auxiliary Parity Carry”

Question 2(c) [7 marks]

#

Draw and Explain Block Diagram of 8085.

Answer:

graph TB
    subgraph "8085 Microprocessor"
        ALU[Arithmetic Logic Unit<br/>8-bit operations]
        ACC[Accumulator<br/>Register A]
        REG[General Purpose<br/>Registers B,C,D,E,H,L]
        PC[Program Counter<br/>16-bit]
        SP[Stack Pointer<br/>16-bit]
        FLAGS[Flag Register<br/>5 flags]
        CU[Control Unit<br/>Instruction decode]
        
        ALU <--> ACC
        REG <--> ALU
        PC --> CU
        CU --> ALU
        FLAGS <--> ALU
    end
    
    EXT["External Buses<br/>Address(16), Data(8), Control"]
    8085 <--> EXT

Table: 8085 Block Components

• Data Flow: Instructions fetched via PC, decoded by CU, executed in ALU
• Register Operations: Accumulator works with ALU, other registers store data
• Address Generation: PC and SP provide 16-bit addresses
• Control Signals: CU generates timing and control signals

Mnemonic: “ALU Accumulator Registers Program Stack Control”

Question 2(a) OR [3 marks]

#

Explain Instruction Fetching, Decoding and Execution Operation in microprocessor.

Answer:

sequenceDiagram
    participant PC as Program Counter
    participant MEM as Memory
    participant IR as Instruction Register
    participant CU as Control Unit
    participant ALU as ALU
    
    PC->>MEM: Send address
    MEM->>IR: Fetch instruction
    IR->>CU: Send opcode
    CU->>ALU: Generate control signals
    ALU->>ALU: Execute operation

Table: Instruction Cycle Phases

Mnemonic: “Fetch Decode Execute”

Question 2(b) OR [4 marks]

#

What is Demultiplexing of Lower order Address and Data lines in 8085? Explain using neat sketch.

Answer:

Demultiplexing Process:

• ALE Signal: Controls separation of address and data
• Latch IC: 74LS373 stores address when ALE is high
• Timing: Address appears first, then data on same lines

Table: Demultiplexing Components

Mnemonic: “Address Latch Enable Demultiplexes Lines”

Question 2(c) OR [7 marks]

#

Draw and Explain Pin Diagram of 8085.

Answer:

Table: 8085 Pin Functions

• Address Lines: 16-bit addressing capability (64KB)
• Data Lines: 8-bit data transfer
• Control Lines: Memory and I/O operation control
• Interrupt Lines: Hardware interrupt handling

Mnemonic: “Address Data Control Interrupt Power Clock”

Question 3(a) [3 marks]

#

Draw IP SFR of 8051 and Explain function of each bit.

Answer:

Table: IP Register Bit Functions

• Priority Levels: 1 = High priority, 0 = Low priority
• Default: All interrupts have low priority (00H)
• Usage: Set bit to 1 for high priority interrupt

Mnemonic: “Timer2 Serial Timer1 External1 External0”

Question 3(b) [4 marks]

#

Draw and explain Timer/Counter Logic diagram for 8051.

Answer:

graph TB
    subgraph "Timer/Counter Logic"
        OSC[System Clock<br/>÷12] --> MUX1{Timer/Counter<br/>Mode Select}
        T0PIN[T0 Pin<br/>External] --> MUX1
        MUX1 --> TH0[TH0 Register<br/>High Byte]
        TH0 --> TL0[TL0 Register<br/>Low Byte]
        TL0 --> OVF[Overflow<br/>Flag TF0]
        
        TMOD[TMOD Register<br/>Mode Control] --> MUX1
        TCON[TCON Register<br/>Control Bits] --> MUX1
    end

Table: Timer Components

• Clock Source: Internal (system clock/12) or External (T0 pin)
• Operation: Counts up from loaded value to FFH
• Overflow: Sets TF0 flag and generates interrupt
• Modes: 4 different timer modes available

Mnemonic: “Timer High-Low Mode Control Flag”

Question 3(c) [7 marks]

#

Draw and Explain Block Diagram of 8051.

Answer:

graph TB
    subgraph "8051 Microcontroller"
        CPU[8-bit CPU<br/>ALU + Control]
        ROM[Program Memory<br/>4KB ROM]
        RAM[Data Memory<br/>128B RAM]
        
        T0[Timer 0<br/>16-bit]
        T1[Timer 1<br/>16-bit]
        UART[Serial Port<br/>Full Duplex]
        
        P0[Port 0<br/>8-bit I/O]
        P1[Port 1<br/>8-bit I/O]
        P2[Port 2<br/>8-bit I/O]
        P3[Port 3<br/>8-bit I/O]
        
        INT[Interrupt<br/>System]
        OSC[Oscillator<br/>Clock Gen]
        
        CPU <--> ROM
        CPU <--> RAM
        CPU <--> T0
        CPU <--> T1
        CPU <--> UART
        CPU <--> P0
        CPU <--> P1
        CPU <--> P2
        CPU <--> P3
        CPU <--> INT
        OSC --> CPU
    end

Table: 8051 Block Components

• Architecture: Harvard architecture with separate program/data memory
• I/O Capability: 32 bidirectional I/O lines
• On-chip Features: Timers, serial port, interrupt system
• Memory: Von-Neumann for data, Harvard for program

Mnemonic: “CPU Program Data I/O Timer Serial Interrupt”

Question 3(a) OR [3 marks]

#

Draw PCON SFR of 8051 and Explain function of each bit.

Answer:

Table: PCON Register Bit Functions

• SMOD: Doubles serial port baud rate when set
• GF1, GF0: User-defined flag bits
• PD: Activates power-down mode
• IDL: Activates idle mode

Mnemonic: “Serial General Power Idle”

Question 3(b) OR [4 marks]

#

In 8051 Serial communication Mode 1, For XTAL=11.0592 MHz, find TH1 value needed to have for 9600 and 4800 baud rate.

Answer:

Formula for Mode 1 Baud Rate:

Baud Rate = (2^SMOD/32) × (Timer1 Overflow Rate)
Timer1 Overflow Rate = XTAL/(12 × (256 - TH1))

For 9600 Baud Rate:

9600 = (1/32) × (11059200/(12 × (256 - TH1)))
9600 = 28800/(256 - TH1)
256 - TH1 = 3
TH1 = 253 = FDH

For 4800 Baud Rate:

4800 = (1/32) × (11059200/(12 × (256 - TH1)))
4800 = 28800/(256 - TH1)
256 - TH1 = 6
TH1 = 250 = FAH

Table: TH1 Values for Baud Rates

Mnemonic: “Higher Baud Higher TH1”

Question 4(a) [3 marks]

#

What are the differences in LCALL and LJMP instructions in 8051?

Answer:

Table: LCALL vs LJMP Comparison

• LCALL: Calls subroutine, saves return address on stack
• LJMP: Unconditional jump to specified address
• Stack Impact: LCALL uses 2 stack bytes, LJMP uses none
• Usage: LCALL for functions, LJMP for program flow control

Mnemonic: “Call Saves Jump Goes”

Question 4(b) [4 marks]

#

Write 8051 Assembly Language Program to generate square wave on port 1.0 using Timer0.

Answer:

ORG 0000H           ; Start address
LJMP MAIN           ; Jump to main program

ORG 0030H           ; Main program start
MAIN:
    MOV TMOD, #01H  ; Timer0 mode1 (16-bit)
    MOV TH0, #HIGH(-50000)  ; Load high byte
    MOV TL0, #LOW(-50000)   ; Load low byte
    SETB TR0        ; Start Timer0

LOOP:
    JNB TF0, LOOP   ; Wait for overflow
    CLR TF0         ; Clear overflow flag
    CPL P1.0        ; Toggle P1.0
    MOV TH0, #HIGH(-50000)  ; Reload timer
    MOV TL0, #LOW(-50000)   ; Reload timer
    SJMP LOOP       ; Repeat

END

Program Explanation:

• Timer Setup: Mode 1 (16-bit timer)
• Count Value: -50000 for specific delay
• Square Wave: Toggle P1.0 on each overflow
• Continuous: Loop maintains square wave

Mnemonic: “Mode Load Start Wait Toggle Reload”

Question 4(c) [7 marks]

#

Explain any three Logical and any four Data Transfer Instruction of 8051 with example.

Answer:

Table: Logical Instructions

Table: Data Transfer Instructions

Detailed Examples:

; Logical Instructions
ANL A, #0FH     ; Mask upper nibble
ORL P1, #80H    ; Set bit 7 of Port1
XRL A, #FFH     ; Complement accumulator

; Data Transfer Instructions
MOV R0, #30H    ; Load immediate data
MOVX @DPTR, A   ; Store to external memory
PUSH B          ; Save B register
POP PSW         ; Restore status word

Mnemonic: “AND OR XOR Move External Push Pop”

Question 4(a) OR [3 marks]

#

Explain Instructions: (i) RRC A (ii) POP (iii) CLR PSW.7

Answer:

Table: Instruction Explanations

• RRC A: Rotates accumulator right through carry flag
• POP: Removes top stack element into specified register
• CLR PSW.7: Clears carry flag (bit 7 of Program Status Word)

Mnemonic: “Rotate Pop Clear”

Question 4(b) OR [4 marks]

#

Write 8051 Assembly Language Program to Divide data stored in location 30H by data stored in location 31H and store remainder in 40h and quotient in 41h memory location.

Answer:

ORG 0000H           ; Program start
LJMP MAIN

ORG 0030H
MAIN:
    MOV A, 30H      ; Load dividend
    MOV B, 31H      ; Load divisor
    DIV AB          ; Divide A by B
    MOV 41H, A      ; Store quotient
    MOV 40H, B      ; Store remainder
    SJMP $          ; Stop here

END

Program Steps:

1. Load Data: Move dividend and divisor to A and B
2. Division: Use DIV AB instruction
3. Store Results: Quotient in A, remainder in B
4. Save: Store results in specified memory locations

Table: DIV AB Instruction

Mnemonic: “Load Divide Store”

Question 4(c) OR [7 marks]

#

List Addressing Modes of 8051 Microcontroller and Explain each with Example.

Answer:

Table: 8051 Addressing Modes

Detailed Examples:

; Immediate Addressing
MOV A, #25H         ; Load immediate value 25H

; Register Addressing  
MOV A, R7           ; Move register R7 to A

; Direct Addressing
MOV A, 40H          ; Load from memory location 40H

; Indirect Addressing
MOV R0, #50H        ; R0 points to address 50H
MOV A, @R0          ; Load from address pointed by R0

; Indexed Addressing
MOV DPTR, #TABLE    ; Point to lookup table
MOVC A, @A+DPTR     ; Load from table[A]

; Relative Addressing
SJMP NEXT           ; Jump to label NEXT

; Bit Addressing
SETB P2.5           ; Set bit 5 of Port 2

Mnemonic: “Immediate Register Direct Indirect Indexed Relative Bit”

Question 5(a) [3 marks]

#

Draw Interfacing of Relay with 8051 microcontroller.

Answer:

Table: Interface Components

• Operation: Port pin HIGH → Transistor ON → Relay energized
• Protection: Diode prevents back EMF damage
• Isolation: Relay provides electrical isolation

Mnemonic: “Transistor Resistor Relay Diode”

Question 5(b) [4 marks]

#

Interface 7 Segment display with 8051 microcontroller and write a program to print “1” on it.

Answer:

Program to Display “1”:

ORG 0000H
LJMP MAIN

ORG 0030H
MAIN:
    MOV P1, #06H    ; Display "1" (segments b,c ON)
    SJMP $          ; Stop here

; Pattern for "1": 00000110 = 06H
; Only segments b and c are ON

END

Table: 7-Segment Display Components

Mnemonic: “Current Limit Segment Pattern”

Question 5(c) [7 marks]

#

Interface DAC 0808 with 8051 microcontroller and write a program to generate Square wave.

Answer:

Program to Generate Square Wave:

ORG 0000H
LJMP MAIN

ORG 0030H
MAIN:
    MOV A, #00H     ; Minimum value (0V)
    MOV P2, A       ; Output to DAC
    CALL DELAY      ; Wait period
    
    MOV A, #0FFH    ; Maximum value (approx 5V)
    MOV P2, A       ; Output to DAC
    CALL DELAY      ; Wait period
    
    SJMP MAIN       ; Repeat for square wave

DELAY:
    MOV R0, #200    ; Delay counter
LOOP1:
    MOV R1, #250    ; Inner loop counter
LOOP2:
    DJNZ R1, LOOP2  ; Inner delay loop
    DJNZ R0, LOOP1  ; Outer delay loop
    RET

END

Table: DAC Interface Specifications

Square Wave Generation:

• Low Level: 00H produces approximately 0V output
• High Level: FFH produces approximately 5V output
• Frequency: Determined by delay routine duration
• Output: Clean analog square wave at DAC output

Mnemonic: “Digital Analog Convert Square”

Question 5(a) OR [3 marks]

#

Interface of Push button Switch with 8051 microcontroller.

Answer:

Table: Push Button Interface Components

Sample Program:

CHECK_SWITCH:
    JB P1.0, SW_RELEASED    ; Jump if switch not pressed
    ; Switch pressed code here
    CALL SWITCH_PRESSED
    SJMP CHECK_SWITCH

SW_RELEASED:
    ; Switch not pressed code here
    SJMP CHECK_SWITCH

SWITCH_PRESSED:
    ; Action when switch is pressed
    RET

Operation:

• Switch Open: Pull-up resistor makes pin HIGH (logic 1)
• Switch Pressed: Pin connected to GND, becomes LOW (logic 0)
• Debouncing: May require software debouncing for reliable operation

Mnemonic: “Pull-up Switch Ground”

Question 5(b) OR [4 marks]

#

Interface DC Motor with 8051 microcontroller.

Answer:

Motor Control Program:

MOTOR_ON:
    SETB P1.0       ; Turn motor ON
    RET

MOTOR_OFF:
    CLR P1.0        ; Turn motor OFF
    RET

MOTOR_SPEED_CONTROL:
    ; PWM for speed control
    SETB P1.0       ; Motor ON
    CALL DELAY_ON   ; ON time duration
    CLR P1.0        ; Motor OFF  
    CALL DELAY_OFF  ; OFF time duration
    RET

DELAY_ON:
    MOV R0, #100    ; ON time delay
    DJNZ R0, $
    RET

DELAY_OFF:
    MOV R0, #50     ; OFF time delay  
    DJNZ R0, $
    RET

Table: DC Motor Interface Components

Operation Principle:

• Motor ON: Port pin HIGH → Transistor saturated → Motor runs
• Motor OFF: Port pin LOW → Transistor cut-off → Motor stops
• Speed Control: PWM technique varies average power to motor
• Protection: Diode protects transistor from back EMF

Mnemonic: “Transistor Resistor Diode Motor”

Question 5(c) OR [7 marks]

#

Interface LCD with 8051 microcontroller and write a program to display “Hello”.

Answer:

Complete LCD Interface Program:

ORG 0000H
LJMP MAIN

ORG 0030H
MAIN:
    CALL LCD_INIT       ; Initialize LCD
    MOV DPTR, #MESSAGE  ; Point to message string
    CALL DISPLAY_STRING ; Display the message
    SJMP $              ; Stop execution

LCD_INIT:
    CALL DELAY_15MS     ; Wait 15ms after power on
    MOV A, #38H         ; Function set: 8-bit mode, 2 lines, 5x7 matrix
    CALL COMMAND_WRITE
    MOV A, #0EH         ; Display on, cursor on, blink off
    CALL COMMAND_WRITE
    MOV A, #01H         ; Clear display
    CALL COMMAND_WRITE
    MOV A, #06H         ; Entry mode: increment cursor, no shift
    CALL COMMAND_WRITE
    RET

COMMAND_WRITE:
    MOV P2, A           ; Send command to data lines (D4-D7)
    CLR P3.0            ; RS = 0 for command
    SETB P3.1           ; Enable pulse high
    CALL DELAY_1MS
    CLR P3.1            ; Enable pulse low
    CALL DELAY_1MS
    RET

DATA_WRITE:
    MOV P2, A           ; Send data to data lines (D4-D7)
    SETB P3.0           ; RS = 1 for data
    SETB P3.1           ; Enable pulse high
    CALL DELAY_1MS
    CLR P3.1            ; Enable pulse low
    CALL DELAY_1MS
    RET

DISPLAY_STRING:
    CLR A
    MOVC A, @A+DPTR     ; Get character from string
    JZ STRING_END       ; If zero, end of string
    CALL DATA_WRITE     ; Display character
    INC DPTR            ; Point to next character
    SJMP DISPLAY_STRING ; Continue until end

STRING_END:
    RET

MESSAGE: DB "HELLO", 0  ; Message string with null terminator

DELAY_1MS:
    MOV R0, #4          ; Outer loop counter
DEL1: 
    MOV R1, #250        ; Inner loop counter  
DEL2: 
    DJNZ R1, DEL2       ; Inner delay loop
    DJNZ R0, DEL1       ; Outer delay loop
    RET

DELAY_15MS:
    MOV R2, #15         ; 15ms delay counter
DEL15: 
    CALL DELAY_1MS      ; Call 1ms delay
    DJNZ R2, DEL15      ; Repeat 15 times
    RET

END

Table: LCD Control Signals

Table: Important LCD Commands

LCD Display Process:

1. Initialization: Configure LCD parameters and clear display
2. Command Mode: Send commands with RS=0
3. Data Mode: Send characters with RS=1
4. Enable Pulse: Latch data/command with EN signal
5. String Display: Loop through message characters until null terminator

Character Display Steps:

• Set RS=1 for data mode
• Put character code on data bus
• Generate enable pulse (HIGH to LOW)
• Wait for LCD to process (1ms delay)
• Repeat for next character

Mnemonic: “Initialize Command Data Enable Display”